Block Diagram

Overview

The S8051XC3 is a synthesizable soft HDL core of a super fast 8-bit microcontroller compatible with the world’s most popular 8051 architecture. It executes the MCS®51 instruction set and 

offers the highest performance, low-energy and a configurable range of features and integrated peripherals.

It is the fastest 8051-compatible 8-bit MCU ever designed (at the time of its release). Running with a single clock per machine cycle, requiring an average of 1.5 to 1.8 machine cycles per instruction (depending on configuration), it delivers from 9.41 to 26.85 times the performance of the original 8051 at the same frequency (measured with Dhrystone 2.1 benchmark), without requiring an external arithmetic acceleration unit (such as an MDU).

A rich set of optional features and peripherals enables designers to closely match the core with their specific application and hardware requirements (FPGA, ASIC, or structured ASIC). Most of the extensions can be individually enabled or disabled from implementation, allowing to reduce the die size when top performance is not required. The core includes all typical 8051 peripherals like Timers, PWM, UART, SPI, I2C and extremely short latency interrupt system with extended priority structure. moreover, Integrated on&chip debugging system using a single-wire or JTAG debugging interface, is also available . Which can operate seamless within IDESs including those from Keil and IAR.

The S8051XC3 builds on our engineering team’s rich experience on the proven 8051 family of processor cores, which have been successfully implemented in hundreds of different customer products since 1997. It is royalty-free and can be purchased with a custom configuration by selecting a set of options.