WWAGO is a leading IP provider, and announce  I3C Secondary Controller Core available. the secondary controller serves as a controller or a target for a MIPI I3C Basic SM interconnection bus.

The new I3C-SC MIPI I3C Basic Secondary Controller is compliant with the latest specification and is easy to integrate and use in any I3C® bus topology. It can coexist and communicate with legacy I2C devices and can operate as such in an I3C or I2C network. 

As a controller, the core can be an additional or the sole controller managing an I3C bus. As a target, the core processes controller commands to interface with I3C Basic devices without needing firmware support, can use I3C dynamic or I2C static addressing, and includes Hot-Join, In-Band Interrupts, and other time- and resource-saving features. 

When operating as a target, the core normally communicates with the host processor via an AMBA® APB Subordinate interface. It can alternatively — and the company believes uniquely — act as a bridge between the I3C and AMBA AHB buses, autonomously converting I3C commands to transfers on its AHB manager port. This gives the remote I3C bus controller access to the local AHB bus, enabling features such as remote over I3C, monitoring, configuration, debugging, firmware updates, and data exchange.

The MIPI I3C Basic interface specification that the core implements is technically identical to MIPI I3C, except it has a somewhat reduced feature set and RAND-Z licensing. The latter means customers can implement systems with the I3C-SC Core without needing to be a MIPI Alliance member and paying the royalties associated with MIPI I3C. 

for more detail information about this Cache Controller core, please contact our sales  by mail:  sales@wwago-inc.com.